JEDEC 1.5V Power Supply VDDQ = 1.5V 800MHz fCK for 1600Mb/sec/pin 8 independent internal banks Programmable CAS latency: 11, 10, 9, 8, 7, 6, 5 Programmable Additive Latency: 0, CL - 2, or CL - 1 clock 8-bit pre-fetch Burst Length: 8 (interleave without any limit, sequential with starting address “000” only), 4 with tCCD = 4 which does not allow seamless read or write (either on the fly using A12 or MRS) Bi-directional Differential Data Strobe Internal (self) calibration: Internal self calibration through ZQ pin (RZQ: 240 ohm ± 1%) On Die Termination using ODT pin Average Refresh Period 7.8us at lower than TCASE 85°C, 3.9us at 85°C < TCASE < 95°Cº Asynchronous Reset PCB: Height 1.180” (30.00mm), double sided component
All prices include 19% VAT.